Aerospace and Electronic Systems Magazine March 2017 - 32

Closed-Loop Control System for Buck Converter
To determine integral gain constants, the position of root locus for a buck converter is modified online as shown in Figure
4(a) to get Ki=36 at the minimum settling time=0.0852 s and rise
time=0.0352 s as shown in Figure 4(b).
Then mikroC software is used for programming the microcontroller that controls the MOSFET of the buck converter based
on the previous Ki value. And so the programmed microcontroller
controls constructed buck converter in Proteus software as indicated in Figure 5.
The simulation result of the system of Figure 5 is recorded in
Figure 6.
As clearly shown in Figure 6, the following results are obtained
for the buck converter controlled by the integral controller:
C

The output voltage (red) follows the reference voltage
(green).

C

Rise time equals 0.05 s.

C

Steady state error equals (+/- 0.1) v.

Figure 3.

(a) The circuit of the buck converter during ton. (b) The circuit of the
buck converter during toff.

DESIGN OF BUCK CONVERTER USING INTEGRAL (I)
CONTROLLER
Integral (I) controller is a special case of PID controller, but with no
use of the proportional (P) and the derivative (D) parts of the error.
So control signal U for an integral controller is presented below
U = K i  Δ dt

(2)

where Ki is integral gain, Δ is the error or deviation of actual process value (PV) from the set point (SP).
(3)

Δ = SP − PV
The integral (I) controller transfer function C(s) is given below
C ( s ) = Ki / S

(4)

Fortunately, the basic approaches for optimal feedback compensator design could be accomplished quickly and easily in the
MATLAB environment. MATLAB provides a graphical user
interface (GUI) so that the closed-loop frequency response can
be interactively changed by online modifying of the pole-zero
pattern of the feedback controller as shown in Figure 4. When
the desired frequency is obtained, users are also presented the
corresponding transfer function of the feedback controller in the
same interface.
32

Figure 4.

(a) Root locus and open-loop bode plots of buck converter. (b) Step
response of buck converter.

IEEE A&E SYSTEMS MAGAZINE

MARCH 2017



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