Aerospace and Electronic Systems Magazine August 2017 - 52

Acquisition of GNSS Signals with Secondary Code
processing time is lower. Note also that the processing time is
divided by approximately NS compared to the post-FFT sequential
implementation.

IMPLEMENTATION OF THE POST-FFT SECONDARY CODE
REMOVAL USING CIRCULAR CORRELATION
In the previous implementations, the output is computed by consecutive portions corresponding to one primary code period. However, it is also possible to compute the output in a different order.
Indeed, the lth samples of the outputs y0, y1, ..., can be obtained
from the circular correlation between the secondary code and the
lth samples of the correlation portions (r0, r1, ...). Starting from (9),
we can write
 y0,l   s0
  
 y1,l  =  s3
 y2,l   s2
  
 y3,l   s1

s1
s0
s3
s2

s2
s1
s0
s3

s3   r0,l 
 
s2   r1,l 
.
s1   r2,l 



s0   r3, l 

Figure 8.

Implementation of the post-FFT secondary code removal using circular
correlation (see (11)) computing each sample of the output sequentially
(the writing and reading orders of the memory are different). See the
timing diagram in Figure 21.

(11)

This circular correlation can be computed traditionally in the time
domain, or using FFTs. However, this means that we need to have
access to the different correlations portions at the same time, therefore, they should be stored into memory as in the implementation
of the post-FFT secondary code removal with a memory.

Figure 9.

Implementation of the post-FFT secondary code removal using circular
correlation (see (11)) computing each sample of the output in parallel
(the writing and reading orders of the memory are different). See the
timing diagram in Figure 22.

Implementation of the Secondary Code Circular Correlation in
a Sequential Way
If the different combinations in (11) are computed in a sequential
way, the accumulation can be done with a simple adder, without
using a memory. The corresponding implementation is shown in
Figure 8.
The processing until the storage of the correlation portions
is similar to the post-FFT implementation with a memory. After,
what is different is the reading order of the memory, because now
we read the first sample of each correlation portion (r0,0, r1,0, ...),
multiply them with the secondary code and accumulate the result.
These samples are then accessed again to test another delay of the
secondary code, and so on and so forth. Thus, they will be accessed
NS times. Then, we read the second sample of each portion (r0,1, r1,1,
...) and the same process is performed, and this is repeated NP times
for the NP delays of the primary code.
Because of the different writing and reading order of the
memory, there is an additional latency introduced compared to the
post-FFT implementation with a memory (this can be clearly seen
comparing Figures 18 and 21), and therefore the processing time
is slightly longer.
With this implementation, the memory needed is twice NPNS ×
B1 bits to store the FFT outputs.

Implementation of the Secondary Code Circular Correlation in
a Parallel Way
It is also possible to compute the NS samples of the output in (11) in
parallel using NS accumulators, as shown in Figure 9.
52

Figure 10.

Implementation of the post-FFT secondary code removal using circular
correlation (see (11)) computing each sample of the output using an FFT
(the writing and reading orders of the memory are different). See the
timing diagram in Figure 23.

The processing until the storage of the correlation portions is
similar to the previous implementation. The only difference is that
we need to read only once the NS samples r0,l, r1,l, ..., to test the NS
combinations. Therefore, compared to the previous implementation, the processing time is reduced a lot (up to NS/3) in exchange
of only NS logic accumulators. However, compared to the post-FFT
parallel implementation, the processing time is slightly higher because of the different order of writing and reading in the memory
that introduces a latency (this can be seen comparing Figures 20
and 22).

Implementation of the Secondary Code Circular Correlation
Using FFTs
As indicated previously, since (11) corresponds to a circular correlation, the operation can be performed using FFTs. The corresponding implementation is shown in Figure 10, where NFFT,S denotes the length of these small FFTs. Following our constraints,

IEEE A&E SYSTEMS MAGAZINE

AUGUST 2017

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