The Magazine of IEEE-Eta Kappa Nu July 2017 - 20

FEATURE

Fig. 5. Power consumption of supercomputers vs. computing performance, compared to projected performance of planned superconducting
computers (bottom). The power estimates for superconductors includes the required refrigeration power, which is dominant. Adapted from ref. [7]

The NSCI is also driving research into alternative
next-generation approaches that may eventually
enable performance which exceeds 1 exaFLOPS. Two
such approaches are superconducting computing
and neuromorphic computing, which are discussed
further below. But there are many other approaches
being considered, focusing on devices, architectures,
algorithms, and systems.
At the device level, a CMOS transistor is orders of
magnitude more power-hungry than the theoretical
minimum, which is kT ln(2) = 3 x 10-21 Joules per
switching event. One could operate transistors at a
reduced voltage, sometimes called "near-threshold
computing", but this increases the likelihood of
random bit errors, which are forbidden in traditional

computing paradigms. If one can devise architectures
and systems that can accommodate such errors, then
lower-power operation may become feasible. This area
of research is referred to as "Approximate Computing."
Alternatively, one could develop a new lower-power
transistor device. Tunneling field effect transistors
(TFETs) and various spintronic devices (based on the
spin or magnetism of an electron) may be candidates
for such devices [5].
Another approach is to move from the classic universal
von Neumann computer processor to specialized
processors for different kinds of applications. For
example, a GPU or graphical processing unit was initially
developed for faster processing of computer graphics,
but these and similar chips are now being applied to

Fig. 6. Conceptual representation of actual conventional supercomputer vs. alternative planned
superconducting computer with a similar computing power. From ref. [6], courtesy of IARPA.
20

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