Aerospace and Electronic Systems Magazine March 2017 - 37
Saoudi, El-Sayed, and Metwally
this figure, input1 reflects the negative error, which
represents the higher value of the required output
and input2 represents the positive error, which represents less than the desired output, while output1
represents the value of the duty cycle that controls
in the firing of the MOSFET.
Then a closed-loop buck converter using an
FLC is constructed in MATLAB/Simulink as
shown in Figure 11.
Finally, a simulation program for the circuit in
Figure 12 is run to get the shape of the output voltage with respect to the reference voltage as shown
in Figure 12.
As shown on Figure 12, the fuzzy controlled
buck converter exhibits the following answers:
Figure 12.
Output voltage (vout) (blue) and reference voltage (vref) (red).
C
The output voltage (blur) follows the reference voltage (red).
C
Rise time equals 0.007 s.
C
Steady state error equals (+/− 0.05) v.
DESIGN OF BUCK CONVERTER USING
TUNED FUZZY LOGIC CONTROLLER (TFLC)
A PID controller is used to tune the previously mentioned FLC for eliminating the output steady state
error and improving the output voltage configuration.
The proportional, integral, and derivative controller gains are estimated by trial and error procedure, based on the mentioned design concepts in
control tutorials for Matlab, PID tutorial. For this
proposed buck controller, the recommended proportional gain constant KP = 10, and the integral
gain constant Ki =5, and the derivative gain constant
KD =5. So this PID controller could be represented
as in Figure 13(a).
Figure 13(b) shows the simulation results of the
circuit shown in Figure 13(a).
From Figure 13(b), the fuzzy controlled buck
converter exhibits the following results:
C
The output voltage (blue) follows the reference voltage (red).
C
Rise time equals 0.007 s.
C
Steady state error equals (+/− 0.01) v.
EXPERIMENTAL VERIFICATION
Figure 13.
(a) Closed-loop control for buck converter using a TFLC. (b) Output voltage (vout) (red)
and reference voltage (vref) (blue).
MARCH 2017
IEEE A&E SYSTEMS MAGAZINE
To verify the concept, the buck converter with the
parameters given in Table 1 has been constructed as
pictured in Figure 14.
The connection diagram of the test rig is shown
in Figure 15. Results in the case of integral and PI
37
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